Logic circuits

How it works

A logic gate maps inputs of 0 and 1 to an output by a fixed rule: AND gives 1 only when both inputs are 1, OR when at least one is 1, XOR when the inputs differ, and NOT inverts the value. Connecting gates creates a circuit. A half adder adds two bits: the sum is A XOR B and the carry to the next digit is A AND B. DFF and TFF flip-flops remember their state, and with a clock signal they can form a counter.

sum S = A ⊕ Bcarry C = A · B

Try it yourself

1. In the half-adder example, toggle inputs A and B through all four combinations. When does “Carry” light up? Only for 1 + 1, because in binary that is 10.
2. Open the “Truth table” and compare it with your prediction.
3. Replace the XOR gate with (A OR B) AND NOT (A AND B) and check that the truth table stays the same.
4. Click “Load 2-bit counter”, start the clock and use the “Timing diagram” to see that Q0 changes on every tick and Q1 on every second tick.

Model limitations

The model uses ideal logic values 0 and 1 and simplified signal propagation. It does not capture voltages, currents, glitches or the exact timing of real circuits.

Related experiments

• Electric circuits
• RLC circuits
• Fractals